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Alif Semiconductor /AE512F80F5582AS_CM55_HE_View /NPU_HE /NPUHE_PMCR

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Interpret as NPUHE_PMCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CNT_EN)CNT_EN 0 (EVENT_CNT_RST)EVENT_CNT_RST 0 (CYCLE_CNT_RST)CYCLE_CNT_RST 0 (MASK_EN)MASK_EN 0NUM_EVENT_CNT

Description

Performance Monitor Control Register

Fields

CNT_EN

Enable PMU. This is the master switch. When the switch is disabled, the PMU is always off. Writing 1 to this field enables PMU operation.
EVENT_CNT_RST

Reset PMU event counter. Writing 1 to this field resets all event counters. If any counter is active, it will continue counting after reset.
CYCLE_CNT_RST

Reset PMU cycle counter. Writing 1 to this field resets the cycle counter. If the cycle counter is active, it will continue counting after reset.
MASK_EN

Allows to enable/disable PMU by command stream operation NPU_OP_PMU_MASK. Note that the [CNT_EN] field in this register must be enabled for the PMU to be active.
NUM_EVENT_CNT

Number of PMU event counters (4 event counters are available)

Links

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Register License

THIS SOFTWARE IS PROVIDED “AS IS”. NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. ALIF SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data